1. Field of the Invention
The present invention generally relates to charge pumping circuitry. More particularly, this invention relates to a method and apparatus for improving the efficiency in charge pump systems for low power applications.
2. Description of the Prior Art
The major components of low power charge pumping system are shown in FIG. 1a. The components are a level detector 110, a ring oscillator 120, and a charge pump 130. When the charge pump 130 drives the output voltage, VPP, 150 above the target voltage, the level detector 110 would disable both the charge pump 130 and ring oscillator 120 to save power. The power dissipation of the circuit driven by the charge pump circuit, which drives node VPP, is consumed during normal operation. When the VPP voltage drops below the target level, the level detector 110 would enable the ring oscillator 120 and the charge pump circuit 130. Once again, the charge pumping system would restart to drive the VPP node until its voltage level goes above the target level again.
FIG. 1b shows a timing diagram of the operation of the charge pumping system of FIG. 1a. As shown in FIG. 1b, when VPP's level is below the target level, the signal ENVPP, which is driven by the level detector goes high. When ENVPP goes high the ring oscillator and charge pump are activated. When VPP is driven to a level, which is above the target level, the ENVPP signal goes low. When ENVPP goes low, the charge pumping system would disable the pumping process in whatever phase (T1 or T2) the charge pumping circuit is in, and the charge pump would go into T1 (off) state directly. A VPP leakage path would occur, if the charge pump stops in the middle of the phase T2 cycle.
FIG. 2a is a device level description of the leakage path, while FIG. 2b illustrates the same leakage path using switches instead of devices. FIG. 2a has device MN1 representing the switch SW1 shown in FIG. 2b. Also, FIG. 2a has device MN2 representing the switch SW2 shown in FIG. 2b. This leakage path occurs for the following reason. During phase T2 as shown in FIGS. 2a, 2b and 2c, switch SW2 is ON and node N3 stays in a higher voltage (>VPP). If we force the charge pump circuit to go back into phase T1 at the midpoint of phase T2, the BST (booster) and N3 nodes would transit to a low level simultaneously. This would produce a leakage path during this phase transition window as shown in FIG. 3. Before BST transits to VSS low level, SW2 is not turned OFF first. Therefore, during the BST transition, a VPP leakage would be generated from node VPP to Node N1 through SW2. This VPP leakage path would occur frequently whenever the level detector stops the charge pump operation as shown in FIG. 1b. A worst case may occur as in FIG. 2d. 
FIG. 2d shows that when VPP is a small amount below the VPP target level, the signal ENVPP would start the charge pump. When the charge pump operates at first T2 cycle, the VPP level would be boosted to above the VPP target and the level detector would disable the charge pump at midway of the T2 cycle. This stop action would enable some VPP power leakage to occur. This would drop the VPP level to a little below the VPP target level. Then, the level detector would restart the pump process again. This repeated changing of phases greatly increases the opportunity for leakage current. Therefore, the efficiency of the whole pumping system would be degraded severely.                U.S. Pat. No. 6,570,434 (Hsu, et al.) describes a dynamic clamp which is used in conjunction with capacitors with thinner dielectric or with deep trench capacitors to solve the problem of dielectric breakdown in high stress capacitors. The dynamic clamp is built using a two stage pump operation cycle such that, during a first stage pump cycle, a middle node of a pair of series connected capacitors is pre-charged to a supply voltage and, during a second stage pump cycle, the middle node is coupled by a boost clock. Thus, at any moment in the pump operation cycle, the voltage across the capacitors is held within a safety range.        U.S. Pat. No. 6,535,052 (Myono) discloses a charge pump circuit of the Dickson type, which circuit is characterized by dock drivers CD1 and CD2 for supplying clock pulses to coupling capacitors C1-C3. In other words, it is arranged in such a manner that the rising time and falling time of the dock pulses CLK and CLKB are extended to the extent that the outputs from the dock drivers CD1 and CD2 will not cause resonance.        U.S. Pat. No. 6,469,571 (Esterl, et al.) describes a charge pump which has two inputs, an input dock signal and an output for the output of a pumped output potential. Two pumping capacitors are connected to the inputs. Second electrodes of the pumping capacitors are in each case connected via a first circuit module to a supply potential (ground) and via a second circuit module to the output. In addition, there is a controllable short-circuiting element, the controllable path of which is disposed between the second electrodes of the two pumping capacitors.        